1. Field of Invention
Embodiments of the invention relate to the process of designing and fabricating semiconductor light-emitting devices. In particular, embodiments of the invention are directed towards improving the light extraction efficiency and increasing the total light output of these devices.
2. Description of Related Art
The extraction efficiency of semiconductor light-emitting devices (LEDs) is limited by the large contrast between the optical refractive indices of semiconductor materials (ns˜2.2-3.6) and that of the surrounding media, typically air (na˜1.0) or optically transparent epoxy (ne˜1.5). This large difference in refractive indices causes photons within the device to have a high probability of being totally-internally-reflected (TIR) when impinging on interfaces between the semiconductor and the ambient media.
To illustrate, for a cube of GaP (optically transparent for wavelengths>555 nm) surrounded by epoxy, a photon λ>555 nm within the GaP (ns˜3.3) striking one of the six interfaces with epoxy (ne˜1.5) must impinge at an angle less than θc˜27° (relative to normal) to avoid being TIR. This constrained range of angles for which transmission is possible defines an “escape cone” for the photon. If the photon is emitted from within the GaP with an equal probability of emission in any direction within 4π steradians, the probability of striking any of the interfaces within an escape cone is 33%. Accounting for Fresnel reflection, the probability of the photon actually being transmitted into the epoxy is 28.4%.
Commercial LEDs are non-ideal devices that contain many optical loss mechanisms, e.g. active layer re-absorption, absorption within internal epitaxial layers, finite ohmic contact reflectivity, free-carrier absorption within doped regions. In particular, for devices with emission layers of low internal quantum efficiency, the loss mechanisms due to the active layer can limit extracted light to only those photons which escape the device without making a second pass through the active layer after emission. This suggests a limit on the achievable extraction efficiency of such devices to not much more than 28.4% (based on the above calculation). To illustrate, the coefficient of absorption for a band-to-band process at the emission wavelength is on the order of 104 cm−1. A photon making a single pass through an emission layer of typical thickness of 1 μm, has a probability of being absorbed equal to 63%. For low quantum efficiency material, the probability of re-emission as a photon is relatively low, for example ˜10%. Thus the first-order probability of the initial photon being absorbed and converted to a non-radiative process is 57%. The problem is exacerbated by other loss mechanisms and by the fact that a majority of photon trajectories traverse more than just the vertical thickness of the active layer. Thus, much of the light escaping the device is light that is transmitted through the semiconductor/ambient interfaces immediately upon first impinging such an interface. This light is “first-pass” light. FIG. 1 shows a schematic diagram depicting first-pass light and some of the aforementioned photon loss mechanisms and paths for escape. “Multiple-pass” light is the light which escapes the chip only after multiple encounters with the surfaces of the LED chip.
Some losses can be reduced by decreasing the thickness of the light-emitting active region and any other absorbing layers. However, fundamental limitations in the materials growth and device physics (e.g. carrier confinement, interfacial recombination) limit the minimum thickness of the active layer at which reasonable radiative efficiencies can be achieved. The selection of the active layer thickness (for material of low radiative efficiency) is a trade-off between internal radiative efficiency and extraction efficiency. Devices of the highest attainable extraction efficiencies will arise from semiconductor LED structure designs that provide for much of the internally emitted light being first-pass. Indeed, even in structures of relatively high internal quantum efficiency, loss due to ohmic contacts and free-carrier absorption still compel designs for more first-pass light extraction. One approach to improve light extraction is to modify the shape or geometry of the chip.
One such shape is the inverted truncated cone device, where the p-n junction is located at or close (within several μm) to the plane of truncation, as disclosed by Franklin, et al., in the Journal of Applied Physics vol. 35, 1153 (1964). The device exhibits enhanced forward-directional light emission characteristics and improved external efficiency. The shaped sidewalls of the conical portion redirect light impinging on this surface towards the top surface at near normal incidence. In Infrared Physics 6, 1(1966), Carr determined that there is a minimum top window height beyond which efficiency no longer increases and further suggests an optimal angle, βm=(π/2−θc)/2, where θc is the critical angle for total internal reflection, for maximum efficiency. This analysis neglects internal absorption and secondary reflections. The light measured is emitted only from the top surface of the device. For high-flux applications, these devices (Franklin, et al. and Carr) are sub-optimum in that they do not utilize side-light which can be 40% or more of the total extracted light from an LED. Also, this device does not employ a heterojunction and would suffer reduced injection efficiency at room temperature relative to the published data at T=77 K. Furthermore, the upper extraction window for this homojunction device is not transparent to a substantial portion of the photons generated within the p-n junction active region. With the internal quantum efficiency of GaAs LEDs typically close to 100% (especially at T=77 K), the relatively low measured value of external quantum efficiency (<10% in air) indicates that omission of side-light collection and poor transparency are contributing to significantly reduced extraction efficiency in this device design.
In “Sov. Phys. Tech. Phys. 23, 476 (1978)”, Alferov et. al. disclosed another shaped LED using a double-mesa structure that improves extraction efficiency by providing bounce paths that avoid the active region and back surface of the device for multiple-pass light. Mesa etching of the sidewall surfaces does not allow control over the angle of the sidewalls which is an important parameter for light extraction and die cost. Also, the double mesa device exhibits an area-ratio from top surface to active area on the order of 9 or more. This area-ratio is the number of devices that can be yielded per unit area on a wafer. Since the reduction in area yield (˜9×) is significantly greater than the observed gain in extraction efficiency (<3× compared to conventional geometries), this device approach is unsuitable for cost-effective high-volume manufacturing.
In U.S. Pat. No. 5,087,949, issued Feb. 11, 1992, Haitz disclosed an LED with diagonal faces for improved light extraction. The active layer in the LEDs is located nearly adjacent to the larger-area base (away from the imaginary apex of the pyramid shape). Consequently, light-emitting regions near the perimeter of the active layer do not fully benefit from the angled sides as do the central regions of the active layer. Therefore, the effective extraction efficiency gains in such a device are limited.
III-Phosphide and III-Arsenide material systems are suitable for the fabrication of light-emitting devices that generate light having photon energies which range, respectively, from the green to the red spectral wavelength regimes and from the red to the infrared wavelength regimes. III-Phosphide material systems include any combination of group III and group V elements with phosphorous. Example III-Phosphide materials include, but are not limited to, AlP, GaP, InP, AlGaP, GaInP, AlGaInP, GaInPN, and GaInAsP. III-Arsenide material systems include any combination of group III and group V elements with arsenic. Example III-Arsenide materials include, but are not limited to, AlAs, GaAs, InAs, AlGaAs, GaInAs, AlGaInAs, GaInAsN, GaAsSb, and GaInAsP.
III-Phosphide and III-Arsenide based light-emitting devices such as light-emitting diodes and laser diodes may be employed in a variety of applications such as street lighting, traffic signals, and liquid crystal display back-lighting. In such applications, it is advantageous to increase the flux (optical energy/unit time) provided by an individual light-emitting device. Unfortunately, the flux provided by conventional III-Phosphide and III-Arsenide based light-emitting devices can be limited by their conventional vertical geometry.
Referring to FIG. 12, for example, a typical conventional III-Phosphide or III-Arsenide light-emitting device 10 includes a III-Phosphide or III-Arsenide active region 12 disposed between an n-type conductive substrate 14 and p-type layer 16. P-contact 18 and n-contacts 20 are disposed on opposite sides of device 10. A suitable forward voltage applied across contact 18 and contacts 20 causes current to flow vertically through p-type layer 16, active region 12, and conductive substrate 14, and thereby causes active region 12 to emit light.
Typically, the flux provided by conventional light-emitting device 10 is reduced because a portion of the light generated in active region 12 is absorbed by conductive substrate 14. In some prior art devices light generated in active region 12 and incident on substrate 14 is absorbed because the band gap energy of substrate 14 is less than the photon energy of the generated light. In other prior art devices, in which the band gap of substrate 14 is greater than the photon energy of the generated light, substrate 14 still absorbs a portion of the generated light incident on it due to absorption by free-carriers in the substrate. These free carriers, typically generated by dopants, are necessary to support electrical conduction through substrate 14 between contact 18 and contacts 20.
Conductive substrate 14 is sometimes wafer bonded to the rest of conventional light-emitting device 10. The resulting wafer bonded interface lies somewhere between contact 18 and contact 20, and hence must be highly electrically conductive if the device is to operate efficiently. This conductivity requirement limits the material choices for the substrate. Also, the relative crystallographic orientations of the substrate and the device layer to which it is wafer bonded may be critically important to achieving low forward bias voltages (as explained in U.S. Pat. Nos. 5,66,316 and 5,783,477, both of which are incorporated herein by reference in their entirety). This complicates the manufacturing process for these devices. In addition, a conventional light-emitting device 10 having a wafer bonded substrate may also include additional layers adjacent to the wafer bonded interface in order to improve the interface's electrical properties. Unfortunately, these additional layers can absorb light emitted by active region 12.
Some conventional light-emitting devices include layers which form a distributed Bragg reflector (DBR) located between active region 12 and absorbing substrate 14. In these devices, some of the light emitted by active region 12 is redirected away from substrate 14 by the DBR. Thus, loss due to absorption in substrate 14 is reduced. The reflectivity of the DBR, which is angle dependent, typically decreases for angles away from normal incidence. Consequently, the DBR typically does not reduce absorption in substrate 14 as much as desired.
The placement of contact 18 on top of conventional light-emitting device 10, opposite from contacts 20, also limits the flux provided by device 10. In particular, contact 18 typically either absorbs light generated in active region 12, or reflects it toward absorbing substrate 14. Moreover, contact 18 is typically electrically connected to a package or a submount with a wire bond. Such wire bonds, which can be mechanically fragile and may not handle large electrical currents, also limit the maximum flux that a conventional device can provide.
In addition, active region 12 is typically separated by substrate 14 from any heat sink on which conventional device 10 is mounted. Consequently, heat generated in or near active region 12 may not be effectively dissipated and the performance of conventional device 10 is degraded.